第1篇 數(shù)字電路設(shè)計(jì)工程師崗位職責(zé)及相關(guān)職位要求
數(shù)字電路設(shè)計(jì)工程師職位要求
1.本科及其以上學(xué)歷，電子類、物理類、計(jì)算機(jī)類專業(yè)畢業(yè)；扎實(shí)的數(shù)字電路基礎(chǔ)；
2.熟練使用cadence、modelsim、vcs、dc、pt等工具進(jìn)行設(shè)計(jì)或驗(yàn)證；熟悉使用fpga開(kāi)發(fā)工具；
3.了解芯片設(shè)計(jì)流程，掌握或精通rtl、dc、pt設(shè)計(jì)方法；
4.有28nm或更先進(jìn)工藝流片經(jīng)驗(yàn)者優(yōu)先考慮。
數(shù)字電路設(shè)計(jì)工程師崗位職責(zé)
1.協(xié)助進(jìn)行芯片設(shè)計(jì)方案、驗(yàn)證方案的制定與編寫；
2.基于方案及相關(guān)流程，獨(dú)立進(jìn)行模塊設(shè)計(jì)和驗(yàn)證等工作；
3.協(xié)助后端進(jìn)行版圖布局與設(shè)計(jì)，并版圖設(shè)計(jì)情況進(jìn)行模塊的迭代優(yōu)化設(shè)計(jì)；
4.協(xié)助版圖設(shè)計(jì)人員進(jìn)行最終的版圖檢查，并形成最終的流片數(shù)據(jù)。
第2篇 asic數(shù)字電路設(shè)計(jì)工程師崗位職責(zé)
asic design engineer 數(shù)字電路設(shè)計(jì)工程師 北京百瑞互聯(lián)技術(shù)有限公司 北京百瑞互聯(lián)技術(shù)有限公司,百瑞 job description
? independent block and soc rtl design and verification
? analog and digital ip integration
? rtl handoff quality check using eda tools
? prepare signoff quality full chip sdc file
? prepare signoff quality full chip upf file
? support asic implementation
? support fpga prototyping
? support dft integration
? support software and system production
? write design documents
qualifications
? 2+ years hands-on experience in asic rtl design. experience in bluetooth, mobile computing or iot is a plus
? familiar with popular asic solutions (including specification and architecture)
? familiar with asic design verification and implementation flow
? familiar with relevant qa tools (for example spyglass)
? strong debugging and analytical skills, generate ideas, and provide innovative solutions to solve technical problems
? english documents reading
? good programming in perl/python, tcl and shell programming
? self-motivated, team work, and good communication skills
